High Gain and Wide Range Time Amplifier Using Inverter Delay Chain in SR Latches
نویسندگان
چکیده
This paper presents a time amplifier design that improves time resolution using an inverter chain delay in SR latches. Compared with the conventional design, the proposed time amplifier has better characteristics such as higher gain, wide range, and small die size. It is implemented using 0.13 μm standard CMOS technology and the experimental results agree well with the theory. key words: time amplifier, time-to-digital converter, SR latch, high resolution delay measurement, all-digital phase-locked loop, inverter delay chain
منابع مشابه
Self-Equalized Distributed Amplifier for Wide Band Optical Transceivers
A novel technique for a self-equalized distributed amplifier is presented by showing the analogy between transversal filters and distributed amplifier topologies. The appropriate delay and gain coefficients of amplifier circuit are obtained by a Fourier expansion of the raised cosine spectrum in the frequency range of 0-40GHz.
متن کاملChannel thickness dependency of high-k gate dielectric based double-gate CMOS inverter
This work investigates the channel thickness dependency of high-k gate dielectric-based complementary metal-oxide-semiconductor (CMOS) inverter circuit built using a conventional double-gate metal gate oxide semiconductor field-effect transistor (DG-MOSFET). It is espied that the use of high-k dielectric as a gate oxide in n/p DG-MOSFET based CMOS inverter results in a high noise margin as well...
متن کاملMetastability of CMOS Latch/Flip-Flop
This paper presents several design issues of CMOS latch/flipflops for meta-stable hardness in terms of optimal device size, aspect ratio, and configurations by using the AC small signal analysis in the frequency domain rather than the time domain. This new design approach is verified experimentally. The power supply disturbance and temperature variation effects on the metastability are measured...
متن کاملDesign, Analysis and Simulation of a Linear Phase Distributed Amplifier
In this paper a new method for the design of a linear phase distributed amplifier in 180nm CMOS technology is presented. The method is based on analogy between transversal filters and distributed amplifiers topologies. In the proposed method the linearity of the phase at frequency range of 0-50 GHz is obtained by using proper weighting factors for each gain stage in cascaded amplifier topology....
متن کاملDesign and simulation of a high-gain organic operational amplifier for use in quantification of cholesterol in low-cost point-of-care devices
This paper presents circuit design and simulations of a high gain organic Op-Amp, for use in quantification of real cholesterol, in the range of 1-9 mM. A 7-stage inverter chain is added onto the design so as to enhance the amplifier gain. The circuit adapts PMOS design architecture with saturated loads, simulated on a conventional platform, using appropriate OTFT model and associated parameter...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- IEICE Transactions
دوره 92-C شماره
صفحات -
تاریخ انتشار 2009